When you say cache you mean that it should be something we did on our side to cache for example?
The fact that this one experiment has this errors is what bugs me the most, I checked the code and saw that we are doing things as we always did so I really can not tell what could be causing.
we did had more then one phase but both phases were 50/50 and they both had the same SRM issue, one tending more to variation 1 and the other one to control